The invention relates generally to random access memory (RAM). More particularly, the invention relates to a flexible hybrid memory element including a flexible inorganic diode and a flexible organic switch.
RAM devices generally include an array of memory cells. The memory cells are typically configured in rows and columns. Each row generally includes a corresponding word line, and each column generally includes a corresponding bit line. FIG. 1 shows an RAM array of memory cells 110, 120, 130, 140, and corresponding word lines (WL) and bit lines (BL). The RAM memory cells 110, 120, 130, 140 are located at cross-points of the word lines and the bit lines, and each RAM memory cells 110, 120, 130, 140 generally stores a bit of information.
The RAM memory cells 110, 120, 130, 140 include functionality for setting the RAM memory cells 110, 120, 130, 140 to one of at least two logical states. Each logical state represents a bit of information. Additionally, the RAM memory cells 110, 120, 130, 140 include functionality for sensing the logical state of each of the RAM memory cells 110, 120, 130, 140.
FIG. 2 shows a RAM memory cell 205 in greater detail. The RAM memory cell 205 generally includes a switch element 210 and a diode element 230. A state of the switch element can be set by the word lines (WL) and the bit lines (BL). The switch element 210 includes two states, each state corresponding to a logical setting. A first state (the switch element 210 being closed) corresponds to a low resistive state. A second state (the switch element 210 being open) corresponds to a high resistive state. The state of the switch, and therefore, the logical setting, can be determined by applying a voltage or current to the word lines (WL) and the bit lines (BL) and sensing the resulting resistance.
The switch element 210 generally includes a material that has a low initial electrical resistance that becomes a high electrical resistance upon passing of a sufficient amount of current (termed a fuse). Alternatively, the switch element 210 generally includes a material that has an initially high electrical resistance that becomes a low electrical resistance upon passing of sufficient current (termed an anti-fuse). Therefore, the resistive of the switch element 210, and therefore, the logical state is set by passing a sufficient amount of current through the switch element 210.
The diode element 230 is placed in series with the switch element 210 ensure that the resistance of only the selected RAM cell is sensed. Voltage potentials between the bit lines (BL) and the word lines (WL) are set so that only the diode element 230 of a selected RAM cell can be forward biased. The diode element 230 ensures that a selected RAM cell within an array of RAM cells does not include sneak paths. Sneak paths results when current conducted by RAM cells other than the selected RAM cell contribute to the current being sensed through the bit lines (BL) and word lines (WL). That is, the logical state of a selected RAM cell is determined by applying a voltage to the selected RAM cell, and sensing the resulting current flowing through the selected RAM cell, and therefore, the resistive state of the selected RAM cell. Without diode elements in series with the switch elements, other memory elements can contribute current (sneak paths) to the sensed current. The diode elements require the word lines (WL) and bit lines (BL) to be properly biased in order to select a particular RAM cell.
Prior art RAM memory cell configurations include switch elements fabricated from an oxide or amorphous silicon, and diode elements fabricated from crystalline silicon. Silicon is expensive and these structures are expensive to fabricate.
Other prior art RAM memory cell configurations include both the switch element and the diode element being formed from amorphous silicon. This configuration, however, can result in the diode element shorting out when the switch element is being set to a low resistance state. Once the diode element is shorted out, it no longer provides any benefits.
It is desirable to have an apparatus and method for providing inexpensive memory cell arrays that are inexpensive to fabricate. The memory cells should be robust. Setting the state of the switch should not cause a series diode to short out.
The invention includes an apparatus and a method for providing RAM memory elements that are cost effective to manufacture. Additionally, the RAM memory elements are robust.
A first embodiment of the invention includes a memory apparatus. The memory apparatus includes a flexible hybrid memory element. The flexible hybrid memory element includes a flexible first conductive layer formed adjacent to a flexible substrate. A flexible diode structure is formed adjacent to the flexible first conductor. A flexible switch is formed adjacent to the flexible diode structure. A flexible second conductive layer is formed adjacent to the flexible switch. The flexible switch is generally formed from an organic material. The flexible diode structure is generally formed from a disordered, inorganic material.
The flexible switch can be formed to create a high resistance path when a threshold amount of current is passed through the flexible switch, or the flexible switch can be formed to create a low resistance path when a threshold amount of current is passed through the flexible switch.
A second embodiment is similar to the first embodiment. The second embodiment further includes a buffer layer formed between the flexible switch and the flexible diode. The buffer layer generally dissipates energy generated by the flexible switch, thereby protecting the flexible diode.
A third embodiment is similar to the first embodiment. The third embodiment includes a plurality of memory elements, in which the memory elements are physically isolated from each other providing electrical isolation between the memory elements. Another embodiment includes the organic switch being anisotropic, thereby providing electrical isolation between the memory elements.
A fourth embodiment is similar to the first embodiment. The fourth embodiment includes the flexible first conductive layer and the flexible second conductive layer being patterned to form a cross-point array. The patterns of the flexible first conductive layer and the flexible second conductive layer can be aligned with patterns formed in the flexible diode structure and the flexible switch.
A fifth embodiment includes a method of forming a plurality of flexible hybrid memory elements. The method includes depositing a flexible first conductive layer on a flexible substrate. A flexible disordered inorganic material is deposited on the flexible first conductor forming a plurality of flexible diode structures. A flexible organic material is deposited on the flexible disordered inorganic material, forming a plurality of flexible switches adjacent to the plurality of flexible diode structures. A flexible second conductor is deposited on the flexible organic material.